Mithuna S Thottethodi -- Publications and Patents

Note on Journals vs. Conferences

For my area of computer architecture and experimental computer systems, conferences are the preferred venues. Conference papers are typically reviewed by 4-5 reviewers followed by a panel review. Typical acceptance rates are 20% or lower. The papers are typically 10+ pages long. (Included below is a table that shows acceptance rates for all of the listed conference publications.)

Journal Publications

1. Tariq Mahmood, Shankaranarayanan P. Narayanan, Sanjay Rao, T. N. Vijaykumar, Mithuna Thottethodi, “Karma: Cost-effective Geo-replicated Cloud Storage with Dynamic Enforcement of Causal Consistency,” IEEE Transactions on Cloud Computing, (accepted in March 2018, to appear).

2. Amin, A.M., Thakur, R., Madren, S., Chuang, H.S., Thottethodi, M., Vijaykumar, T.N., Wereley, S.T., Jacobson, S.C., “Software-programmable continuous-flow multi-purpose lab-on-a-chip,” Microfluidic and Nanofluidics, DOI 10.1007/s10404-013-1180-2, 2013.

3. F. Ahmad, S. Lee, M. Thottethodi, T. N. Vijaykumar, “MapReduce with communication overlap (MaRCO),” Journal of Parallel and Distributed Computing, 73(5): 608-620 (2013). (Available online since Dec 2012).

4. P. Ndai, N. Rafique, M. Thottethodi, S. Ghosh, S. Bhunia, K. Roy, “Trifecta: A Non-Speculative Scheme to Exploit Common, Data-Dependent Subcritical Paths,” IEEE Transactions on Very Large Scale Integration Systems (IEEE TVLSI), 18(1), pages 53–65, January 2010.

5. M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, “Exploiting Global Knowledge to Achieve Self-Tuned Congestion Control for kary n-cube Networks,” IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), 15(3), pages 257–272, March 2004.

6. S. Chatterjee, A. R. Lebeck, P. K. Patnala, M. Thottethodi, “Recursive Array Layouts and Fast Parallel Matrix Multiplication,” IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), 13(11), pages 1105–1123, November 2002.

Refereed Conference Publications

1. Ashish Gondimalla, Noah Chesnut, Mithuna Thottethodi, T. N. Vijaykumar, “SparTen: A Sparse Tensor Accelerator for Convolutional Neural Networks ”, Proceedings of the 52nd IEEE/ACM International Symposium on Microarchitecture (MICRO 2019), 13 pages, (Accepted, to appear)

2. Nitin, Mithuna Thottethodi, T. N. Vijaykumar, “Millipede: Memory Optimizations in Die-Stacked Architectures for Big Data Machine Learning Analytics”, Proceedings of the 32nd IEEE International Parallel and Distributed Processing Symposium (IPDPS 2018), 12 pages,

3. Ashiwan Sivakumar, Chuan Jiang, Yun Seong Nam, Shankaranarayanan Puzhavakath Narayanan, Vijay Gopalakrishnan, Sanjay G. Rao, Subhabrata Sen, Mithuna Thottethodi, T. N. Vijaykumar, “NutShell: Scalable Whittled Proxy Execution for Low-Latency Web over Cellular Networks,” Proceedings of the 23rd Annual International Conference on Mobile Computing and Networking, (ACM MobiCom 2017), pp 448-461

4. Nitin, Mithuna Thottethodi, T. N. Vijaykumar, Milind Kulkarni, “Efficient Collaborative Approximation in MapReduce without Missing Rare Keys,” International Conference on Cloud and Autonomic Computing (ICCAC 2017), pp 80-91

5. Ahmed H. Abdel-Gawad, Mithuna Thottethodi, “Scalable, Global, Optimal-bandwidth, Application-Specific Routing,” 2016 IEEE 24th Annual Symposium on High-Performance Interconnects (HOTI), Santa Clara, CA, 2016, pp. 9-18.

6. Michael LeBeane, Brandon Potter, Abhisek Pan, Alexandru Dutu, Vinay Agarwala, Wonchan Lee, Deepak Majeti, Bibek Ghimire, Eric Van Tassell, Samuel Wasmundt, Brad Benton, Mauricio Breternitz, Michael L. Chu, Mithuna Thottethodi, Lizy K. John, Steven K. Reinhardt, “Extended task queuing: active messages for heterogeneous systems,” International Conference for High Performance Computing, Networking, Storage and Analysis, (SC16): 80:1-80:12.

7. Ahmed H. Abdel-Gawad, Mithuna Thottethodi, Abhinav Bhatele, “RAHTM: Routing Algorithm Aware Hierarchical Task Mapping,” International Conference for High Performance Computing, Networking, Storage and Analysis, (SC14), pages 325-335, Nov 2014.

8. Eric Villasenor, Timothy Pritchett, Jagadeesh M Dyaberi, Vijay S. Pai, Mithuna Thottethodi, "MorphStore: A local file system for Big Data with utility-driven replication and load-adaptive access scheduling," 30th Symposium on Mass Storage Systems and Technologies (MSST), 2014, pp.1,10, 2-6 June 2014.

9. Yu-Ju Hong, Mithuna Thottethodi, “Understanding and Mitigating the Impact of Load Imbalance in the Memory Caching Tier,” Proceedings of the ACM Symposium on Cloud Computing 2013 (SoCC 2013), 17pp, Oct 2013.

10. Jiachen Xue, Mithuna Thottethodi, “PreTrans: Reducing TLB CAM-search via page number prediction and speculative pre-translation,” Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED-2013) pages 341-346, Sep 2013.

11. J. Sim, G. H. Loh, H. Kim, M. O'Connor, M. Thottethodi, "A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch," Proceedings of the 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), Dec. 2012

12. Yu-Ju Hong, Jiachen Xue, Mithuna Thottethodi, “Selective Commitment and Selective Margin: Techniques to Minimize Cost in an IaaS Cloud,” Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems and Software, April 2012, 11pp.

a. (Short version. Reviewed independently.) Yu-Ju Hong, Jiachen Xue, Mithuna Thottethodi: Dynamic server provisioning to minimize cost in an IaaS cloud. SIGMETRICS 2011: pages147-148

13. Ahmed H. Abdel-Gawad, Mithuna Thottethodi, “TransCom: transforming stream communication for load balance and efficiency in networks-on-chip,” Proceedings of the 2011 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-2011), pages 237-247

14. S. A. R. Jafri, Y. -J. Hong, M. Thottethodi, T. N. Vijaykumar,“Adaptive Flow Control for Robust Performance and Energy,” Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-2010), December 2010, pages 433-444.

15. T. Pritchett, M. Thottethodi, “SieveStore: A Highly-Selective, Ensemble-level Disk Cache for Cost-Performance,” Proceedings of the 37th International Symposium on Computer Architecture (ISCA-2010), pages163-174, June 2010.

16. S. A. R. Jafri, M. Thottethodi, T. N. Vijaykumar, “LiteTM: Reducing Transactional State Overhead,” Proceedings of the Sixteenth International Symposium on High Performance Computer Architecture (HPCA-16), pages 81-92, January 2010,

17. M.C. Johnson, E. Villasenor, O. Krachina, M. Thottethodi, “Undergraduate Dual-Core Prototyping and Analysis of Factors Influencing Student Success on Dual-Core Designs,” Proceedings of IEEE International Conference on Microelectronic Systems Education, 4pp, July 2009.

18. D. Seo, M. Thottethodi, “Disjoint-Path Routing: Efficient Communication for Streaming Applications,” Proceedings of the 23rd IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 1-12. May 2009.

19. H.-S. Chuang, A. Amin, S.T. Wereley, M. Thottethodi, T.N. Vijaykumar, S.C. Jacobson, “Polydimethylsiloxane (PDMS) Peristaltic Pump Characterization for Programmable Lab-on-a-Chip Applications,” 12th International Conference on Miniaturized Systems for Chemistry and Life Sciences (MICROTAS 2008), 3pp, Oct 2008.

20. E. Villasenor, D. Seo, M. Thottethodi, “Power-Efficient Clustering via Incomplete Bypassing,” Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED-2008), pages 369-374, Aug 2008.

21. A. Amin, M. Thottethodi, T. N. Vijaykumar, S. T. Wereley, S. C. Jacobson, “Automatic Volume Management in Programmable Microfluidics,” Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI-2008), pages 56-67, June 2008.

22. W. -T. Lim, M. Thottethodi, “Evaluating ISA support and Hardware Support for Recursive Data Layouts,” Proceedings of the 14th Annual IEEE International Conference on High Performance Computing (HiPC 2007), pages 95-106, Dec 2007.

23. A. Amin, M. Thottethodi, T.N. Vijaykumar, S.T. Wereley, S.C. Jacobson, “Aquacore: A General-Purpose Architecture for Programmable Microfluidics,” 11th International Conference on Miniaturized Systems for Chemistry and Life Sciences (MICROTAS 2007), 3pp, Oct 2007.

24. N. Rafique, W.-T. Lim, M. Thottethodi, “Effective Management of DRAM Bandwidth in Multicore Processors,” Proceedings of the 16th International Conference on Parallel Architectures and Compilation Technology (PACT 2007), pages 245-258, Sep 2007.

25. A. Amin, M. Thottethodi, T. N. Vijaykumar, S. T. Wereley, S. C. Jacobson, “A Programmable Architecture for Microfluidics,” Proceedings of the 34th International Symposium on Computer Architecture (ISCA-2007), pages 254-265, June 2007.

26. D. Seo, M. Thottethodi, “Table-lookup based Crossbar Arbitration for Minimal-Routed, 2D Mesh and Torus Networks,” Proceedings of the 21st IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 1-10, March 2007.

27. N. Rafique, W.-T. Lim, M. Thottethodi, “Architectural Support for Operating System-Driven CMP Cache Management,” Proceedings of the 15th International Conference on Parallel Architectures and Compilation Technology (PACT 2006), pages 2-12, Sep 2006.

28. D. Seo, A. Ali, W.-T. Lim, N. Rafique, M. Thottethodi, “Near-Optimal Worst-case Throughput Routing in Two Dimensional Mesh Networks”, Proceedings of the 32nd International Symposium on Computer Architecture (ISCA-2005), pages 432-443, June 2005.

29. M. Thottethodi, A. R. Lebeck, S. Mukherjee, “BLAM: A High-Performance Routing Algorithm for Virtual Cut-Through Networks”, 17th International Parallel and Distributed Processing Symposium (IPDPS), pages 10pp, April 2003.

30. M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, “Self-Tuned Congestion Control for Multiprocessor Networks, Proceedings of the Seventh International Symposium on High Performance Computer Architecture (HPCA-7), pages 107- 118, January 2001

31. A. R. Lebeck, D. R. Raymond, C. Yang, M. S. Thottethodi, “Annotated Memory References: A Mechanism for Informed Cache Management”, Proceedings of the 5th International Euro-Par Conference, Lecture Notes in Computer Science 1685, P. Amestoy et. al. (editors) Springer-Verlag, pages 1251-1254, August 1999.

32. S. Chatterjee, A. R. Lebeck, P. K. Patnala, M. S. Thottethodi, “Recursive Array Layouts and Fast Matrix Multiplication,” Proceedings of the 11th ACM Symposium on Parallel Algorithms and Architectures (SPAA '99), pages 222-231, June 1999.

33. S. Chatterjee, V. Jain, A. R. Lebeck, S. Mundhra, M. S. Thottethodi, “Nonlinear Array Layouts for Hierarchical Memory Systems,” 13th ACM International Conference on Supercomputing (ICS '99), pages 444-453, June 1999.

34. Mithuna S. Thottethodi, Siddhartha Chatterjee, and Alvin R. Lebeck, “Tuning Strassen’s Matrix Multiplication For Memory Efficiency”, Supercomputing ’98, 16pp, November 1998 (Best Student Paper Finalist)

Conference	Accepted papers	Submitted papers	Acceptance rate	Number of pages
MICRO 2019	79	344	23%	13
IPDPS 2018	38	461	8%	12
MobiCom 2017	38	207	18%	14
ICCAC 2017	18	53	34%	12
HOTI 2016	9	31	29%	10
SC 2016	81	442	18%	12
SC 2014	81	394	21%	11
MSST 2014	21	124	17%	10
SOCC 2013	23	114	20%	17
ISLPED 2013	60	167	36%	6
MICRO 2012	40	228	18%	11
ISPASS 2012	20	65	31%	11
MICRO 2011	44	209	21%	11
MICRO 2010	42	248	17%	12
ISCA 2010	44	245	18%	12
HPCA 2010	32	175	18%	12
IPDPS 2009	100	440	23%	12
ISLPED 2008	63	159	40%	6
PLDI 2008	34	184	18%	12
HiPC 2007	53	253	21%	12
PACT 2007	34	174	20%	14
ISCA 2007	46	204	23%	12
IPDPS 2007	109	419	26%	10
PACT 2006	30	117	26%	11
ISCA 2005	45	194	23%	12
IPDPS 2003	119	407	29%	10
HPCA 2001	26	110	24%	12
SPAA 1999	26	90	29%	10
ICS 1999	57	180	32%	10
SC 1998			20%	16

Refereed Posters

1. Tariq Mahmood, Shankaranarayanan Puzhavakath Narayanan, Sanjay Rao, T. N. Vijaykumar, and Mithuna Thottethodi, “Karma: Cost-effective Geo-replicated Cloud Storage with Dynamic Enforcement of Causal Consistency”, Poster presentation at ACM Symposium on Cloud Computing 2016 (SoCC 2016).

Reports

1. Kevin Kai-Wei Chang, Gabriel H. Loh, Mithuna Thottethodi, Yasuko Eckert, Mike O'Connor, Srilatha Manne, Lisa Hsu, Lavanya Subramanian, Onur Mutlu: “Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism.” The Computing Research Repository CoRR abs/1602.00722 (2016) (URL: https://arxiv.org/abs/1602.00722)

2. Nitin, Mithuna Thottethodi, and T.N. Vijaykumar, “RowCore: A Processing-Near-Memory Architecture for Big Data Machine Learning,” Technical Report TR-ECE-16-02, School of Electrical and Computer Engineering, Purdue University.

3. Tariq Mahmood, Shankaranarayanan Puzhavakath Narayanan, Sanjay Rao, T. N. Vijaykumar, and Mithuna Thottethodi, “Achieving Causal Consistency under Partial Replication for Geo-distributed Cloud Storage,” Technical Report TR-ECE-16-04, School of Electrical and Computer Engineering, Purdue University.

4. Nitin, Mithuna Thottethodi, T.N. Vijaykumar, and Milind Kulkarni, “Stratified Online Sampling for Sound Approximation in MapReduce, Technical Report TR ECE 15-07, School of Electrical and Computer Engineering, Purdue University.

5. Syed Ali Raza Jafri, Hamza Bin Sohail, Mithuna Thottethodi, and T.N. Vijaykumar, “apSLIP: A High-performance Adaptive-Effort Pipelined Switch Allocator,” Technical Report TR-ECE-13-13, School of Electrical and Computer Engineering, Purdue University.

6. Faraz Ahmad, Seyong Lee, Mithuna Thottethodi, and T. N. Vijaykumar, “PUMA: Purdue MapReduce Benchmarks Suite,” Technical Report TR-ECE-12-11, School of Electrical and Computer Engineering, Purdue University.

7. Ahmed Hamdy Abdel-Gawad and Mithuna Thottethodi, “TxComm: Transforming Stream Communication for Load Balance, Efficiency, and Fault-tolerance in Networks-on-Chip,” Technical Report TR-ECE-11-11, School of Electrical and Computer Engineering, Purdue University.

8. Yu-Ju Hong, Mithuna Thottethodi, and Jiachen Xue, “Dynamic Server Provisioning to Minimize Cost in an IaaS Cloud,” Technical Report TR-ECE-11-08, School of Electrical and Computer Engineering, Purdue University.

9. N. Rafique, M. Thottethodi, “Architectural Support for Operating System-Driven CMP Cache Management,” Technical Report TR-ECE-06-11, June 2006, School of Electrical and Computer Engineering, Purdue University.

10. D. Seo, A. Ali, W.-T. Lim, N. Rafique, M. Thottethodi, “Near-Optimal Worst-case Throughput Routing in Two Dimensional Mesh Networks”, Technical Report TR-ECE 05-03, March, 2005, School of Electrical and Computer Engineering, Purdue University.

11. M. S. Thottethodi, A. R. Lebeck, S. S. Mukherjee, “Key Components of High-Performance Routing Algorithms for Virtual Cut-Through Networks”, Technical Report CS-2002-02, January 2002, Department of Computer Science, Duke University.

12. M. S. Thottethodi, A. R. Lebeck, S. Mukherjee, “Self-Tuned Congestion Control for Multiprocessor Networks”, Technical Report CS-2000-15, November 2000, Department of Computer Science, Duke University.

13. Alvin R. Lebeck, David R. Raymond, Mithuna S. Thottethodi, “Annotated Memory References: A Mechanism for Informed Cache Management”, Technical Report CS-1998-02, Febrary 1998, Department of Computer Science, Duke University.

Research Funding

1. “PNM Architecture for Big Data, (Renewal)” PI: T. N. Vijaykumar, CoPI: Mithuna Thottethodi. SK Hynix, $155,993.00 Oct 2017 – Sep 2018.

2. “CSR: Small: SmartEdge for Low Latency and Consistent Mobile Web Applications,” PI: Mithuna Thottethodi, Co-PIs: Sanjay Rao, T. N. Vijaykumar, National Science Foundation (NSF), Award number: CNS-1618921, Award amount: $500,000, Award duration: Oct 2016 – Sep 2019.

3. “BIGDATA: Collaborative Research: F: RDMA-Based Datacenter Networks for Online Big Data Applications,” Lead Institution: Purdue. Other collaborating institution: University of Illinois at Chicago. PI (Purdue): Mithuna Thottethodi, Co-PI: T. N. Vijaykumar, PI (University of Illinois at Chicago): Balajee Vamanan), National Science Foundation (NSF), Award number: IIS-1633412(Purdue) + IIS-1633318 (UIC), Award amount (Purdue: $570,000; University of Illinois at Chicago: $279,000). Award duration: Sep 2016 – Aug 2019.

4. “PNM Architecture for Big Data,” PI: T. N. Vijaykumar, CoPI: Mithuna Thottethodi. SK Hynix, $124,993 Oct 2016 – Sep 2017

5. AT&T Gift. (With Sanjay Rao) Thottethodi’s project $20,000 (Gift date: April 2016).

6. “II-New: A Cluster of Nodes with 32 Cores and 256-GB Memory to Enable Many-Core Systems Research and Education,” PI: T. N. Vijaykumar, CoPIs: Antony Hosking, Vijay Pai, Milind Kulkarni, National Science Foundation (NSF), Award number: CNS-1405939, Award amount: $286,300. Award duration: Aug 2014 – Jul 2017

7. “CCF: SHF Small: Coping with the Slowing of Dennard's Scaling,” PI: T. N. Vijaykumar, CoPI: M. Thottethodi. National Science Foundation (NSF), Award number: CCF- 1218473, Award Amount: $100,000. Award duration: Jul 2012 – Jun 2013.

8. PRF International Travel Grant, Award Amount: $1000, Jul 2008.

9. “CRI: IAD: Accelerator-based High Performance Computing”, PI: V. Pai, CoPIs: M. Thottethodi, Y. C. Hu, V. Raghunathan, R. Eigenmann. National Science Foundation (NSF), Award number: CNS-0751153, Award Amount: $569,865. Award duration: Apr 2008 – Mar 2011.

10. “A Framework for Non-Silicon Based Nano-scale Design: From Devices to System Architecture”, PI: K. Roy, CoPI: M. Thottethodi. National Science Foundation (NSF), Award number: CCF-0702612, Award Amount: $361,264. Award duration: Oct 2007 – Sep 2010.

11. “Collaborative Research: Architecture and Prototype for a Programmable Lab-on-a-Chip”, PI (Purdue): T. N. Vijaykumar, CoPIs (Purdue): M. Thottethodi, S. Wereley. PI (IU Bloomington) S. C. Jacobson. National Science Foundation (NSF), Award numbers: CCF-0726821 (Purdue) and CCF-0726694 (IU Bloomington), Award amount: $500,000. Award duration: Sep 2007 – Aug 2010.

12. “CAREER: Cross-Layer Schemes For Flexible Resource Sharing in Multicore Systems”, PI: M. Thottethodi. National Science Foundation (NSF) CAREER award, Award number: CCF-0644183, Award amount: $250,000. Award duration: Aug 2007 – Jul 2012.

13. “Performance Models and Systems Optimization for Disk-Bound Applications”, PI: M. Thottethodi, CoPIs: R. Shah, V. Pai, J. S. Vitter and T. N. Vijaykumar. National Science Foundation (NSF), Award number: CCF-0621457, Award amount: $889,788. Award duration: October 2006 – September 2010.

14. “CPA: Reconfigurable On-Chip Network Design Framework for Performance and Fault Tolerance”, PI: M. Thottethodi. National Science Foundation (NSF), Award number: CCF-0541385, Award amount: $250,000. Award duration: September 2006 – August 2010.

15. “Enhancing and Exploiting Proximal Re-use in Chip Multiprocessors”, M. Thottethodi. Purdue Research Foundation (PRF) Research Grant, $29,627, August 2004 – December 2006.

16. “Complexity-Effective Router Pipelines for On-chip Networks”, M. Thottethodi. Purdue Research Foundation (PRF) Summer Faculty Grant, $7,000, June 2004 – July 2004.

Patents (with co-inventors)

1. [9,825,843] Die-stacked device with partitioned multi-hop network

2. [9,766,936] Selecting a resource from a set of resources for performing an operation

3. [9,710,392] Virtual memory mapping for improved DRAM page locality

4. [9,626,428] Apparatus and method for hash table access

5. [9,552,294] Dynamically configuring regions of a main memory in a write-back mode or a write-through mode

6. [9,529,718] Batching modified blocks to the same DRAM page

7. [9,251,069] Mechanisms to bound the presence of cache blocks with specific properties in caches

8. [9,211,539] Variable volume mixing and automatic fluid management for programmable microfluidics

9. [9,183,055] Selecting a resource from a set of resources for performing an operation

10. [9,165,097] Programmable microfluidic systems and related methods

11. [9,128,856] Selective cache fills in response to write misses

12. [9,075,730] Mechanisms to bound the presence of cache blocks with specific properties in caches

13. [9,065,722] Die-stacked device with partitioned multi-hop network

14. [8,935,472] Processing device with independently activatable working memory bank and methods