Purdue University - Cadence University Program



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Cadence use at Purdue University

Currently, the Custom Integrated Circuits bundle, the Custom Integrated Circuits bundle, the Verification Bundle, and the Silicon-Package-Board bundle are all actively used in the School of Electrical and Computer Engineering at Purdue University. For more information on our use of Cadence tools, the groups and courses using the tools, and for value added items, please see the following links.

 


Value Added Items for Deep Sub-Micron and Custom Integrated Circuits


We have also developed a variety of other lab exercises and tutorials, but links are not included because those materials include substantial information about products not produced by Cadence Design Systems, Inc. Contact Mark C. Johnson (mcjohnso@purdue.edu) for more information. Topics include analog simulation, VHDL simulation, and an ASIC design flow from VHDL to layout and timing verification.


Disclaimer

These pages only contain information that is related to products produced by Cadence Design Systems, Inc.

These pages do NOT contain any information on any other vendor's products.

This is NOT a "Cadence Homepage".

Information is provided "as is" without warranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise.

Please use this information at your own risk - and any attempt to use this information is at your own risk - we recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are personally satisfied with the use of this information within your environment.

Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.


Contact Information:

Mark C. Johnson (mcjohnso@purdue.edu)


Last modified: Friday June 18, 2013