Invited Lectures

  1. "Low-Power, Noise-Aware, Interconnect-Driven Floor-Planning", (with Prof. Kaushik Roy), Intel Corporation, Hillsboro, OR, September 3, 1999.

  2. "Noise-Aware, Interconnect-Driven Physical Design," Ultima Interconnect Technology, Inc., Sunnyvale, CA, November 5, 1999.

  3. "Efficient Approximate Balanced Truncation of Large-Scale RLC Systems," BTA-Ultima Interconnect Technology, Inc., San Jose, CA, January 19, 2001.

  4. "Synthesis of High Performance Clock Trees," School of Computing, National University of Singapore, Republic of Singapore, July 25, 2001.

  5. "Modeling and Synthesis of On-Chip RLC Networks," Department of Electrical and Computer Engineering, National University of Singapore, Republic of Singapore, July 27, 2001.