Research Group: Integrated Systems Laboratory
ISL pursues innovative research that enables future integrated Systems-on-chip. Current projects focus on:

  • domain-specific architecture
  • computing with Post-CMOS devices
  • variation-tolerant System-on-chips
  • heterogeneous parallel computing.
Our research addresses challenges and opportunities posed by the workloads of the future (such as Recognition, Mining and Synthesis), architectural trends (such as massive chip-scale parallelism), and extreme device scaling (such as the move to post-CMOS devices).

My previous research at NEC Labs focused on developing advanced technologies (HW and SW architectures, design methodologies, and design automation tools) for System-on-Chips and embedded computing & communication systems that use them.

Some of the research areas I have worked on include:
  • Secure Embedded System Design.
  • Mobile Appliance Security.
  • Low-power integrated circuit design.
  • Battery-efficient embedded systems.
  • On-chip communication architecture.
  • VLSI Test.

My earlier research at Princeton University focused on developing tools for designing low-power integrated circuits at the register-transfer and behavioral levels of design abstraction.