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00010 #ifndef _PIC24_ADC_H_
00011 #define _PIC24_ADC_H_
00012
00013
00018 uint16 convertADC1(void);
00019 void configADC1_ManualCH0(uint16 u16_Ch0PositiveMask,uint8 u8_autoSampleTime,uint8 u8_Use12bits);
00020 void configADC1_AutoScanIrqCH0(uint16 u16_ch0ScanMask,uint8 u8_autoSampleTime,uint8 u8_12bit);
00021 void configADC1_AutoHalfScanIrqCH0(uint16 u16_ch0ScanMask,uint8 u8_autoSampleTime,uint8 u8_12bit);
00022 void configADC1_Simul4ChanIrq(uint8 u8_ch0Select, uint16 u16_ch123SelectMask, uint16 u16_numTcyMask);
00023
00029 #define IS_CONVERSION_COMPLETE_ADC1() AD1CON1bits.DONE
00030
00032 inline static void WAIT_UNTIL_CONVERSION_COMPLETE_ADC1() {
00033 while (!IS_CONVERSION_COMPLETE_ADC1())
00034 doHeartbeat();
00035 }
00036
00042 #define IS_SAMPLING_ADC1() AD1CON1bits.SAMP
00043 #define SET_SAMP_BIT_ADC1() AD1CON1bits.SAMP=1
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055
00056
00057 #define ADC_MODULE_ON 0x8000
00058 #define ADC_MODULE_OFF 0x0000
00059 #define ADC_MODULE_MASK (~ADC_MODULE_ON)
00060
00061 #define ADC_IDLE_CONTINUE 0x2000
00062 #define ADC_IDLE_STOP 0x0000
00063 #define ADC_IDLE_MASK (~ADC_IDLE_CONTINUE)
00064
00065 #define ADC_ADDMABM_SCATTER 0x0000
00066 #define ADC_ADDMABM_ORDER 0x1000
00067 #define ADC_ADDMABM_MASK (~ADC_ADDMABM_ORDER)
00068
00069 #define ADC_12BIT 0x0400
00070 #define ADC_10BIT 0x0000
00071
00072 #define ADC_FORMAT_SIGN_FRACT 0x0300
00073 #define ADC_FORMAT_FRACT 0x0200
00074 #define ADC_FORMAT_SIGN_INT 0x0100
00075 #define ADC_FORMAT_INTG 0x0000
00076 #define ADC_FORMAT_MASK (~ADC_FORMAT_SIGN_FRACT)
00077
00078 #define ADC_CLK_AUTO 0x00E0
00079 #define ADC_CLK_MPWM 0x0060
00080 #define ADC_CLK_TMR 0x0040
00081 #define ADC_CLK_INT0 0x0020
00082 #define ADC_CLK_MANUAL 0x0000
00083 #define ADC_CLK_MASK (~ADC_CLK_AUTO)
00084
00085 #define ADC_SAMPLE_SIMULTANEOUS 0x0008
00086 #define ADC_SAMPLE_INDIVIDUAL 0x0000
00087
00088 #define ADC_AUTO_SAMPLING_ON 0x0004
00089 #define ADC_AUTO_SAMPLING_OFF 0x0000
00090 #define ADC_AUTO_SAMPLING_MASK (~ADC_AUTO_SAMPLING_ON)
00091
00092 #define ADC_SAMP_ON 0x0002
00093 #define ADC_SAMP_OFF 0x0000
00094 #define ADC_SAMP_MASK (~ADC_SAMP_ON)
00095
00096
00097
00098 #define ADC_VREF_EXT_AVSS 0x2000
00099 #define ADC_VREF_AVDD_EXT 0x4000
00100 #define ADC_VREF_EXT_EXT 0x6000
00101 #define ADC_VREF_AVDD_AVSS 0x8000
00102 #define ADC_VREF_MASK (~(ADC_VREF_AVDD_AVSS | ADC_VREF_EXT_EXT))
00103
00104 #define ADC_SCAN_ON 0x0400
00105 #define ADC_SCAN_OFF 0x0000
00106 #define ADC_SCAN_MASK (~ADC_SCAN_ON)
00107
00108 #define ADC_CONVERT_CH0 0x0000
00109 #define ADC_CONVERT_CH01 0x0100
00110 #define ADC_CONVERT_CH0123 0x0300
00111
00112 #define ADC_INTR_EACH_CONV 0x0000
00113 #define ADC_INTR_2_CONV 0x0004
00114 #define ADC_INTR_3_CONV 0x0008
00115 #define ADC_INTR_4_CONV 0x000C
00116 #define ADC_INTR_5_CONV 0x0010
00117 #define ADC_INTR_6_CONV 0x0014
00118 #define ADC_INTR_7_CONV 0x0018
00119 #define ADC_INTR_8_CONV 0x001C
00120 #define ADC_INTR_9_CONV 0x0020
00121 #define ADC_INTR_10_CONV 0x0024
00122 #define ADC_INTR_11_CONV 0x0028
00123 #define ADC_INTR_12_CONV 0x002C
00124 #define ADC_INTR_13_CONV 0x0030
00125 #define ADC_INTR_14_CONV 0x0034
00126 #define ADC_INTR_15_CONV 0x0038
00127 #define ADC_INTR_16_CONV 0x003C
00128 #define ADC_INTR_MASK (~ADC_INTR_16_CONV)
00129
00130
00131 #define ADC_ALT_BUF_ON 0x0002
00132 #define ADC_ALT_BUF_OFF 0x0000
00133 #define ADC_ALT_BUF_MASK (~ADC_ALT_BUF_ON)
00134
00135 #define ADC_ALT_BUF_STATUS_2 0x0080
00136 #define ADC_ALT_BUF_STATUS_MASK (~ADC_ALT_BUF_STATUS_MASK)
00137
00138
00139 #define ADC_ALT_INPUT_ON 0x0001
00140
00141 #define ADC_ALT_INPUT_OFF 0x0000
00142 #define ADC_ALT_MASK (~ADC_ALT_INPUT_ON)
00143
00144
00145 #define ADC_CONV_CLK_INTERNAL_RC 0x8000
00146 #define ADC_CONV_CLK_SYSTEM 0x0000
00147 #define ADC_CONV_CLK_SOURCE_MASK (~ADC_CONV_CLK_INTERNAL_RC)
00148
00149 #define ADC_SAMPLE_TIME_0 0x0000
00150 #define ADC_SAMPLE_TIME_1 0x0100
00151 #define ADC_SAMPLE_TIME_2 0x0200
00152 #define ADC_SAMPLE_TIME_3 0x0300
00153 #define ADC_SAMPLE_TIME_4 0x0400
00154 #define ADC_SAMPLE_TIME_5 0x0500
00155 #define ADC_SAMPLE_TIME_6 0x0600
00156 #define ADC_SAMPLE_TIME_7 0x0700
00157 #define ADC_SAMPLE_TIME_8 0x0800
00158 #define ADC_SAMPLE_TIME_9 0x0900
00159 #define ADC_SAMPLE_TIME_10 0x0A00
00160 #define ADC_SAMPLE_TIME_11 0x0B00
00161 #define ADC_SAMPLE_TIME_12 0x0C00
00162 #define ADC_SAMPLE_TIME_13 0x0D00
00163 #define ADC_SAMPLE_TIME_14 0x0E00
00164 #define ADC_SAMPLE_TIME_15 0x0F00
00165 #define ADC_SAMPLE_TIME_16 0x1000
00166 #define ADC_SAMPLE_TIME_17 0x1100
00167 #define ADC_SAMPLE_TIME_18 0x1200
00168 #define ADC_SAMPLE_TIME_19 0x1300
00169 #define ADC_SAMPLE_TIME_20 0x1400
00170 #define ADC_SAMPLE_TIME_21 0x1500
00171 #define ADC_SAMPLE_TIME_22 0x1600
00172 #define ADC_SAMPLE_TIME_23 0x1700
00173 #define ADC_SAMPLE_TIME_24 0x1800
00174 #define ADC_SAMPLE_TIME_25 0x1900
00175 #define ADC_SAMPLE_TIME_26 0x1A00
00176 #define ADC_SAMPLE_TIME_27 0x1B00
00177 #define ADC_SAMPLE_TIME_28 0x1C00
00178 #define ADC_SAMPLE_TIME_29 0x1D00
00179 #define ADC_SAMPLE_TIME_30 0x1E00
00180 #define ADC_SAMPLE_TIME_31 0x1F00
00181 #define ADC_SAMPLE_TIME_MASK (~ADC_SAMPLE_TIME_31)
00182
00183
00184 #define ADC_CONV_CLK_256Tcy 0x00FF
00185 #define ADC_CONV_CLK_255Tcy 0x00FE
00186 #define ADC_CONV_CLK_254Tcy 0x00FD
00187 #define ADC_CONV_CLK_253Tcy 0x00FC
00188 #define ADC_CONV_CLK_252Tcy 0x00FB
00189 #define ADC_CONV_CLK_251Tcy 0x00FA
00190 #define ADC_CONV_CLK_250Tcy 0x00F9
00191 #define ADC_CONV_CLK_249Tcy 0x00F8
00192 #define ADC_CONV_CLK_248Tcy 0x00F7
00193 #define ADC_CONV_CLK_247Tcy 0x00F6
00194 #define ADC_CONV_CLK_246Tcy 0x00F5
00195 #define ADC_CONV_CLK_245Tcy 0x00F4
00196 #define ADC_CONV_CLK_244Tcy 0x00F3
00197 #define ADC_CONV_CLK_243Tcy 0x00F2
00198 #define ADC_CONV_CLK_242Tcy 0x00F1
00199 #define ADC_CONV_CLK_241Tcy 0x00F0
00200 #define ADC_CONV_CLK_240Tcy 0x00EF
00201 #define ADC_CONV_CLK_239Tcy 0x00EE
00202 #define ADC_CONV_CLK_238Tcy 0x00ED
00203 #define ADC_CONV_CLK_237Tcy 0x00EC
00204 #define ADC_CONV_CLK_236Tcy 0x00EB
00205 #define ADC_CONV_CLK_235Tcy 0x00EA
00206 #define ADC_CONV_CLK_234Tcy 0x00E9
00207 #define ADC_CONV_CLK_233Tcy 0x00E8
00208 #define ADC_CONV_CLK_232Tcy 0x00E7
00209 #define ADC_CONV_CLK_231Tcy 0x00E6
00210 #define ADC_CONV_CLK_230Tcy 0x00E5
00211 #define ADC_CONV_CLK_229Tcy 0x00E4
00212 #define ADC_CONV_CLK_228Tcy 0x00E3
00213 #define ADC_CONV_CLK_227Tcy 0x00E2
00214 #define ADC_CONV_CLK_226Tcy 0x00E1
00215 #define ADC_CONV_CLK_225Tcy 0x00E0
00216 #define ADC_CONV_CLK_224Tcy 0x00DF
00217 #define ADC_CONV_CLK_223Tcy 0x00DE
00218 #define ADC_CONV_CLK_222Tcy 0x00DD
00219 #define ADC_CONV_CLK_221Tcy 0x00DC
00220 #define ADC_CONV_CLK_220Tcy 0x00DB
00221 #define ADC_CONV_CLK_219Tcy 0x00DA
00222 #define ADC_CONV_CLK_218Tcy 0x00D9
00223 #define ADC_CONV_CLK_217Tcy 0x00D8
00224 #define ADC_CONV_CLK_216Tcy 0x00D7
00225 #define ADC_CONV_CLK_215Tcy 0x00D6
00226 #define ADC_CONV_CLK_214Tcy 0x00D5
00227 #define ADC_CONV_CLK_213Tcy 0x00D4
00228 #define ADC_CONV_CLK_212Tcy 0x00D3
00229 #define ADC_CONV_CLK_211Tcy 0x00D2
00230 #define ADC_CONV_CLK_210Tcy 0x00D1
00231 #define ADC_CONV_CLK_209Tcy 0x00D0
00232 #define ADC_CONV_CLK_208Tcy 0x00CF
00233 #define ADC_CONV_CLK_207Tcy 0x00CE
00234 #define ADC_CONV_CLK_206Tcy 0x00CD
00235 #define ADC_CONV_CLK_205Tcy 0x00CC
00236 #define ADC_CONV_CLK_204Tcy 0x00CB
00237 #define ADC_CONV_CLK_203Tcy 0x00CA
00238 #define ADC_CONV_CLK_202Tcy 0x00C9
00239 #define ADC_CONV_CLK_201Tcy 0x00C8
00240 #define ADC_CONV_CLK_200Tcy 0x00C7
00241 #define ADC_CONV_CLK_199Tcy 0x00C6
00242 #define ADC_CONV_CLK_198Tcy 0x00C5
00243 #define ADC_CONV_CLK_197Tcy 0x00C4
00244 #define ADC_CONV_CLK_196Tcy 0x00C3
00245 #define ADC_CONV_CLK_195Tcy 0x00C2
00246 #define ADC_CONV_CLK_194Tcy 0x00C1
00247 #define ADC_CONV_CLK_193Tcy 0x00C0
00248 #define ADC_CONV_CLK_192Tcy 0x00BF
00249 #define ADC_CONV_CLK_191Tcy 0x00BE
00250 #define ADC_CONV_CLK_190Tcy 0x00BD
00251 #define ADC_CONV_CLK_189Tcy 0x00BC
00252 #define ADC_CONV_CLK_188Tcy 0x00BB
00253 #define ADC_CONV_CLK_187Tcy 0x00BA
00254 #define ADC_CONV_CLK_186Tcy 0x00B9
00255 #define ADC_CONV_CLK_185Tcy 0x00B8
00256 #define ADC_CONV_CLK_184Tcy 0x00B7
00257 #define ADC_CONV_CLK_183Tcy 0x00B6
00258 #define ADC_CONV_CLK_182Tcy 0x00B5
00259 #define ADC_CONV_CLK_181Tcy 0x00B4
00260 #define ADC_CONV_CLK_180Tcy 0x00B3
00261 #define ADC_CONV_CLK_179Tcy 0x00B2
00262 #define ADC_CONV_CLK_178Tcy 0x00B1
00263 #define ADC_CONV_CLK_177Tcy 0x00B0
00264 #define ADC_CONV_CLK_176Tcy 0x00AF
00265 #define ADC_CONV_CLK_175Tcy 0x00AE
00266 #define ADC_CONV_CLK_174Tcy 0x00AD
00267 #define ADC_CONV_CLK_173Tcy 0x00AC
00268 #define ADC_CONV_CLK_172Tcy 0x00AB
00269 #define ADC_CONV_CLK_171Tcy 0x00AA
00270 #define ADC_CONV_CLK_170Tcy 0x00A9
00271 #define ADC_CONV_CLK_169Tcy 0x00A8
00272 #define ADC_CONV_CLK_168Tcy 0x00A7
00273 #define ADC_CONV_CLK_167Tcy 0x00A6
00274 #define ADC_CONV_CLK_166Tcy 0x00A5
00275 #define ADC_CONV_CLK_165Tcy 0x00A4
00276 #define ADC_CONV_CLK_164Tcy 0x00A3
00277 #define ADC_CONV_CLK_163Tcy 0x00A2
00278 #define ADC_CONV_CLK_162Tcy 0x00A1
00279 #define ADC_CONV_CLK_161Tcy 0x00A0
00280 #define ADC_CONV_CLK_160Tcy 0x009F
00281 #define ADC_CONV_CLK_159Tcy 0x009E
00282 #define ADC_CONV_CLK_158Tcy 0x009D
00283 #define ADC_CONV_CLK_157Tcy 0x009C
00284 #define ADC_CONV_CLK_156Tcy 0x009B
00285 #define ADC_CONV_CLK_155Tcy 0x009A
00286 #define ADC_CONV_CLK_154Tcy 0x0099
00287 #define ADC_CONV_CLK_153Tcy 0x0098
00288 #define ADC_CONV_CLK_152Tcy 0x0097
00289 #define ADC_CONV_CLK_151Tcy 0x0096
00290 #define ADC_CONV_CLK_150Tcy 0x0095
00291 #define ADC_CONV_CLK_149Tcy 0x0094
00292 #define ADC_CONV_CLK_148Tcy 0x0093
00293 #define ADC_CONV_CLK_147Tcy 0x0092
00294 #define ADC_CONV_CLK_146Tcy 0x0091
00295 #define ADC_CONV_CLK_145Tcy 0x0090
00296 #define ADC_CONV_CLK_144Tcy 0x008F
00297 #define ADC_CONV_CLK_143Tcy 0x008E
00298 #define ADC_CONV_CLK_142Tcy 0x008D
00299 #define ADC_CONV_CLK_141Tcy 0x008C
00300 #define ADC_CONV_CLK_140Tcy 0x008B
00301 #define ADC_CONV_CLK_139Tcy 0x008A
00302 #define ADC_CONV_CLK_138Tcy 0x0089
00303 #define ADC_CONV_CLK_137Tcy 0x0088
00304 #define ADC_CONV_CLK_136Tcy 0x0087
00305 #define ADC_CONV_CLK_135Tcy 0x0086
00306 #define ADC_CONV_CLK_134Tcy 0x0085
00307 #define ADC_CONV_CLK_133Tcy 0x0084
00308 #define ADC_CONV_CLK_132Tcy 0x0083
00309 #define ADC_CONV_CLK_131Tcy 0x0082
00310 #define ADC_CONV_CLK_130Tcy 0x0081
00311 #define ADC_CONV_CLK_129Tcy 0x0080
00312 #define ADC_CONV_CLK_128Tcy 0x007F
00313 #define ADC_CONV_CLK_127Tcy 0x007E
00314 #define ADC_CONV_CLK_126Tcy 0x007D
00315 #define ADC_CONV_CLK_125Tcy 0x007C
00316 #define ADC_CONV_CLK_124Tcy 0x007B
00317 #define ADC_CONV_CLK_123Tcy 0x007A
00318 #define ADC_CONV_CLK_122Tcy 0x0079
00319 #define ADC_CONV_CLK_121Tcy 0x0078
00320 #define ADC_CONV_CLK_120Tcy 0x0077
00321 #define ADC_CONV_CLK_119Tcy 0x0076
00322 #define ADC_CONV_CLK_118Tcy 0x0075
00323 #define ADC_CONV_CLK_117Tcy 0x0074
00324 #define ADC_CONV_CLK_116Tcy 0x0073
00325 #define ADC_CONV_CLK_115Tcy 0x0072
00326 #define ADC_CONV_CLK_114Tcy 0x0071
00327 #define ADC_CONV_CLK_113Tcy 0x0070
00328 #define ADC_CONV_CLK_112Tcy 0x006F
00329 #define ADC_CONV_CLK_111Tcy 0x006E
00330 #define ADC_CONV_CLK_110Tcy 0x006D
00331 #define ADC_CONV_CLK_109Tcy 0x006C
00332 #define ADC_CONV_CLK_108Tcy 0x006B
00333 #define ADC_CONV_CLK_107Tcy 0x006A
00334 #define ADC_CONV_CLK_106Tcy 0x0069
00335 #define ADC_CONV_CLK_105Tcy 0x0068
00336 #define ADC_CONV_CLK_104Tcy 0x0067
00337 #define ADC_CONV_CLK_103Tcy 0x0066
00338 #define ADC_CONV_CLK_102Tcy 0x0065
00339 #define ADC_CONV_CLK_101Tcy 0x0064
00340 #define ADC_CONV_CLK_100Tcy 0x0063
00341 #define ADC_CONV_CLK_99Tcy 0x0062
00342 #define ADC_CONV_CLK_98Tcy 0x0061
00343 #define ADC_CONV_CLK_97Tcy 0x0060
00344 #define ADC_CONV_CLK_96Tcy 0x005F
00345 #define ADC_CONV_CLK_95Tcy 0x005E
00346 #define ADC_CONV_CLK_94Tcy 0x005D
00347 #define ADC_CONV_CLK_93Tcy 0x005C
00348 #define ADC_CONV_CLK_92Tcy 0x005B
00349 #define ADC_CONV_CLK_91Tcy 0x005A
00350 #define ADC_CONV_CLK_90Tcy 0x0059
00351 #define ADC_CONV_CLK_89Tcy 0x0058
00352 #define ADC_CONV_CLK_88Tcy 0x0057
00353 #define ADC_CONV_CLK_87Tcy 0x0056
00354 #define ADC_CONV_CLK_86Tcy 0x0055
00355 #define ADC_CONV_CLK_85Tcy 0x0054
00356 #define ADC_CONV_CLK_84Tcy 0x0053
00357 #define ADC_CONV_CLK_83Tcy 0x0052
00358 #define ADC_CONV_CLK_82Tcy 0x0051
00359 #define ADC_CONV_CLK_81Tcy 0x0050
00360 #define ADC_CONV_CLK_80Tcy 0x004F
00361 #define ADC_CONV_CLK_79Tcy 0x004E
00362 #define ADC_CONV_CLK_78Tcy 0x004D
00363 #define ADC_CONV_CLK_77Tcy 0x004C
00364 #define ADC_CONV_CLK_76Tcy 0x004B
00365 #define ADC_CONV_CLK_75Tcy 0x004A
00366 #define ADC_CONV_CLK_74Tcy 0x0049
00367 #define ADC_CONV_CLK_73Tcy 0x0048
00368 #define ADC_CONV_CLK_72Tcy 0x0047
00369 #define ADC_CONV_CLK_71Tcy 0x0046
00370 #define ADC_CONV_CLK_70Tcy 0x0045
00371 #define ADC_CONV_CLK_69Tcy 0x0044
00372 #define ADC_CONV_CLK_68Tcy 0x0043
00373 #define ADC_CONV_CLK_67Tcy 0x0042
00374 #define ADC_CONV_CLK_66Tcy 0x0041
00375 #define ADC_CONV_CLK_65Tcy 0x0040
00376 #define ADC_CONV_CLK_64Tcy 0x003F
00377 #define ADC_CONV_CLK_63Tcy 0x003E
00378 #define ADC_CONV_CLK_62Tcy 0x003D
00379 #define ADC_CONV_CLK_61Tcy 0x003C
00380 #define ADC_CONV_CLK_60Tcy 0x003B
00381 #define ADC_CONV_CLK_59Tcy 0x003A
00382 #define ADC_CONV_CLK_58Tcy 0x0039
00383 #define ADC_CONV_CLK_57Tcy 0x0038
00384 #define ADC_CONV_CLK_56Tcy 0x0037
00385 #define ADC_CONV_CLK_55Tcy 0x0036
00386 #define ADC_CONV_CLK_54Tcy 0x0035
00387 #define ADC_CONV_CLK_53Tcy 0x0034
00388 #define ADC_CONV_CLK_52Tcy 0x0033
00389 #define ADC_CONV_CLK_51Tcy 0x0032
00390 #define ADC_CONV_CLK_50Tcy 0x0031
00391 #define ADC_CONV_CLK_49Tcy 0x0030
00392 #define ADC_CONV_CLK_48Tcy 0x002F
00393 #define ADC_CONV_CLK_47Tcy 0x002E
00394 #define ADC_CONV_CLK_46Tcy 0x002D
00395 #define ADC_CONV_CLK_45Tcy 0x002C
00396 #define ADC_CONV_CLK_44Tcy 0x002B
00397 #define ADC_CONV_CLK_43Tcy 0x002A
00398 #define ADC_CONV_CLK_42Tcy 0x0029
00399 #define ADC_CONV_CLK_41Tcy 0x0028
00400 #define ADC_CONV_CLK_40Tcy 0x0027
00401 #define ADC_CONV_CLK_39Tcy 0x0026
00402 #define ADC_CONV_CLK_38Tcy 0x0025
00403 #define ADC_CONV_CLK_37Tcy 0x0024
00404 #define ADC_CONV_CLK_36Tcy 0x0023
00405 #define ADC_CONV_CLK_35Tcy 0x0022
00406 #define ADC_CONV_CLK_34Tcy 0x0021
00407 #define ADC_CONV_CLK_33Tcy 0x0020
00408 #define ADC_CONV_CLK_32Tcy 0x001F
00409 #define ADC_CONV_CLK_31Tcy 0x001E
00410 #define ADC_CONV_CLK_30Tcy 0x001D
00411 #define ADC_CONV_CLK_29Tcy 0x001C
00412 #define ADC_CONV_CLK_28Tcy 0x001B
00413 #define ADC_CONV_CLK_27Tcy 0x001A
00414 #define ADC_CONV_CLK_26Tcy 0x0019
00415 #define ADC_CONV_CLK_25Tcy 0x0018
00416 #define ADC_CONV_CLK_24Tcy 0x0017
00417 #define ADC_CONV_CLK_23Tcy 0x0016
00418 #define ADC_CONV_CLK_22Tcy 0x0015
00419 #define ADC_CONV_CLK_21Tcy 0x0014
00420 #define ADC_CONV_CLK_20Tcy 0x0013
00421 #define ADC_CONV_CLK_19Tcy 0x0012
00422 #define ADC_CONV_CLK_18Tcy 0x0011
00423 #define ADC_CONV_CLK_17Tcy 0x0010
00424 #define ADC_CONV_CLK_16Tcy 0x000F
00425 #define ADC_CONV_CLK_15Tcy 0x000E
00426 #define ADC_CONV_CLK_14Tcy 0x000D
00427 #define ADC_CONV_CLK_13Tcy 0x000C
00428 #define ADC_CONV_CLK_12Tcy 0x000B
00429 #define ADC_CONV_CLK_11Tcy 0x000A
00430 #define ADC_CONV_CLK_10Tcy 0x0009
00431 #define ADC_CONV_CLK_9Tcy 0x0008
00432 #define ADC_CONV_CLK_8Tcy 0x0007
00433 #define ADC_CONV_CLK_7Tcy 0x0006
00434 #define ADC_CONV_CLK_6Tcy 0x0005
00435 #define ADC_CONV_CLK_5Tcy 0x0004
00436 #define ADC_CONV_CLK_4Tcy 0x0003
00437 #define ADC_CONV_CLK_3Tcy 0x0002
00438 #define ADC_CONV_CLK_2Tcy 0x0001
00439 #define ADC_CONV_CLK_1Tcy 0x0000
00440 #define ADC_CONV_CLK_MASK (~ADC_CONV_CLK_256Tcy)
00441
00442
00443 #define ADC_DMA_BUF_LOC_128 0x0007
00444 #define ADC_DMA_BUF_LOC_64 0x0006
00445 #define ADC_DMA_BUF_LOC_32 0x0005
00446 #define ADC_DMA_BUF_LOC_16 0x0004
00447 #define ADC_DMA_BUF_LOC_8 0x0003
00448 #define ADC_DMA_BUF_LOC_4 0x0002
00449 #define ADC_DMA_BUF_LOC_2 0x0001
00450 #define ADC_DMA_BUF_LOC_1 0x0000
00451 #define ADC_DMA_BUF_LOC_MASK (~ADC_DMA_BUF_LOC_128)
00452
00453
00454 #define ADC_CH0_NEG_SAMPLEB_AN1 0x8000
00455 #define ADC_CH0_NEG_SAMPLEB_VREFN 0x0000
00456 #define ADC_CH0_NEG_SAMPLEB_MASK (~ADC_CH0_NEG_SAMPLEB_AN1)
00457
00458 #define ADC_CH0_POS_SAMPLEB_AN15 0x0F00
00459 #define ADC_CH0_POS_SAMPLEB_AN14 0x0E00
00460 #define ADC_CH0_POS_SAMPLEB_AN13 0x0D00
00461 #define ADC_CH0_POS_SAMPLEB_AN12 0x0C00
00462 #define ADC_CH0_POS_SAMPLEB_AN11 0x0B00
00463 #define ADC_CH0_POS_SAMPLEB_AN10 0x0A00
00464 #define ADC_CH0_POS_SAMPLEB_AN9 0x0900
00465 #define ADC_CH0_POS_SAMPLEB_AN8 0x0800
00466 #define ADC_CH0_POS_SAMPLEB_AN7 0x0700
00467 #define ADC_CH0_POS_SAMPLEB_AN6 0x0600
00468 #define ADC_CH0_POS_SAMPLEB_AN5 0x0500
00469 #define ADC_CH0_POS_SAMPLEB_AN4 0x0400
00470 #define ADC_CH0_POS_SAMPLEB_AN3 0x0300
00471 #define ADC_CH0_POS_SAMPLEB_AN2 0x0200
00472 #define ADC_CH0_POS_SAMPLEB_AN1 0x0100
00473 #define ADC_CH0_POS_SAMPLEB_AN0 0x0000
00474 #define ADC_CH0_POS_SAMPLEB_MASK (~ADC_CH0_POS_SAMPLEB_AN15)
00475
00476 #define ADC_CH0_NEG_SAMPLEA_AN1 0x0080
00477 #define ADC_CH0_NEG_SAMPLEA_VREFN 0x0000
00478 #define ADC_CH0_NEG_SAMPLEA_MASK (~ADC_CH0_NEG_SAMPLEA_AN1)
00479
00480 #define ADC_CH0_POS_SAMPLEA_AN15 0x000F
00481 #define ADC_CH0_POS_SAMPLEA_AN14 0x000E
00482 #define ADC_CH0_POS_SAMPLEA_AN13 0x000D
00483 #define ADC_CH0_POS_SAMPLEA_AN12 0x000C
00484 #define ADC_CH0_POS_SAMPLEA_AN11 0x000B
00485 #define ADC_CH0_POS_SAMPLEA_AN10 0x000A
00486 #define ADC_CH0_POS_SAMPLEA_AN9 0x0009
00487 #define ADC_CH0_POS_SAMPLEA_AN8 0x0008
00488 #define ADC_CH0_POS_SAMPLEA_AN7 0x0007
00489 #define ADC_CH0_POS_SAMPLEA_AN6 0x0006
00490 #define ADC_CH0_POS_SAMPLEA_AN5 0x0005
00491 #define ADC_CH0_POS_SAMPLEA_AN4 0x0004
00492 #define ADC_CH0_POS_SAMPLEA_AN3 0x0003
00493 #define ADC_CH0_POS_SAMPLEA_AN2 0x0002
00494 #define ADC_CH0_POS_SAMPLEA_AN1 0x0001
00495 #define ADC_CH0_POS_SAMPLEA_AN0 0x0000
00496 #define ADC_CH0_POS_SAMPLEA_MASK (~ADC_CH0_POS_SAMPLEA_AN15)
00497
00498
00499 #define ADC_CH123_NEG_SAMPLEB_AN9AN10AN11 0x0600
00500 #define ADC_CH123_NEG_SAMPLEB_AN6AN7AN8 0x0400
00501 #define ADC_CH123_NEG_SAMPLEB_VREFN 0x0000
00502 #define ADC_CH123_NEG_SAMPLEB_MASK (~ADC_CH123_NEG_SAMPLEB_AN9_AN10_AN11)
00503
00504 #define ADC_CH123_POS_SAMPLEB_AN3AN4AN5 0x0100
00505 #define ADC_CH123_POS_SAMPLEB_AN0AN1AN2 0x0000
00506 #define ADC_CH123_POS_SAMPLEB_MASK (~ADC_CH123_POS_SAMPLEB_AN3_AN4_AN5)
00507
00508 #define ADC_CH123_NEG_SAMPLEA_AN9AN10AN11 0x0006
00509 #define ADC_CH123_NEG_SAMPLEA_AN6AN7AN8 0x0004
00510 #define ADC_CH123_NEG_SAMPLEA_VREFN 0x0000
00511 #define ADC_CH123_NEG_SAMPLEA_MASK (~ADC_CH123_NEG_SAMPLEA_AN9_AN10_AN11)
00512
00513 #define ADC_CH123_POS_SAMPLEA_AN3AN4AN5 0x0001
00514 #define ADC_CH123_POS_SAMPLEA_AN0AN1AN2 0x0000
00515 #define ADC_CH123_POS_SAMPLEA_MASK (~ADC_CH123_POS_SAMPLEA_AN3_AN4_AN5)
00516
00517
00518
00519 #define ENABLE_AN0_ANA 0x0001
00520 #define ENABLE_AN1_ANA 0x0002
00521 #define ENABLE_AN2_ANA 0x0004
00522 #define ENABLE_AN3_ANA 0x0008
00523 #define ENABLE_AN4_ANA 0x0010
00524 #define ENABLE_AN5_ANA 0x0020
00525 #define ENABLE_AN6_ANA 0x0040
00526 #define ENABLE_AN7_ANA 0x0080
00527 #define ENABLE_AN8_ANA 0x0100
00528 #define ENABLE_AN9_ANA 0x0200
00529 #define ENABLE_AN10_ANA 0x0400
00530 #define ENABLE_AN11_ANA 0x0800
00531 #define ENABLE_AN12_ANA 0x1000
00532 #define ENABLE_AN13_ANA 0x2000
00533 #define ENABLE_AN14_ANA 0x4000
00534 #define ENABLE_AN15_ANA 0x8000
00535
00536 #define ENABLE_ALL_ANA_0_15 0xFFFF
00537 #define ENABLE_ALL_DIG_0_15 0x0000
00538
00539
00540 #define ADC_SCAN_AN0 0x0001
00541 #define ADC_SCAN_AN1 0x0002
00542 #define ADC_SCAN_AN2 0x0004
00543 #define ADC_SCAN_AN3 0x0008
00544 #define ADC_SCAN_AN4 0x0010
00545 #define ADC_SCAN_AN5 0x0020
00546 #define ADC_SCAN_AN6 0x0040
00547 #define ADC_SCAN_AN7 0x0080
00548 #define ADC_SCAN_AN8 0x0100
00549 #define ADC_SCAN_AN9 0x0200
00550 #define ADC_SCAN_AN10 0x0400
00551 #define ADC_SCAN_AN11 0x0800
00552 #define ADC_SCAN_AN12 0x1000
00553 #define ADC_SCAN_AN13 0x2000
00554 #define ADC_SCAN_AN14 0x4000
00555 #define ADC_SCAN_AN15 0x8000
00556
00557 #define ENABLE_ALL_INPUT_SCAN 0xFFFF
00558 #define DISABLE_ALL_INPU_SCAN 0x0000
00559
00560
00561 #define ADC_SCAN_AN16 0x0001
00562 #define ADC_SCAN_AN17 0x0002
00563 #define ADC_SCAN_AN18 0x0004
00564 #define ADC_SCAN_AN19 0x0008
00565 #define ADC_SCAN_AN20 0x0010
00566 #define ADC_SCAN_AN21 0x0020
00567 #define ADC_SCAN_AN22 0x0040
00568 #define ADC_SCAN_AN23 0x0080
00569 #define ADC_SCAN_AN24 0x0100
00570 #define ADC_SCAN_AN25 0x0200
00571 #define ADC_SCAN_AN26 0x0400
00572 #define ADC_SCAN_AN27 0x0800
00573 #define ADC_SCAN_AN28 0x1000
00574 #define ADC_SCAN_AN29 0x2000
00575 #define ADC_SCAN_AN30 0x4000
00576 #define ADC_SCAN_AN31 0x8000
00577
00578
00579 #define ADC_INT_PRI_0 0x0000
00580 #define ADC_INT_PRI_1 0x0001
00581 #define ADC_INT_PRI_2 0x0002
00582 #define ADC_INT_PRI_3 0x0003
00583 #define ADC_INT_PRI_4 0x0004
00584 #define ADC_INT_PRI_5 0x0005
00585 #define ADC_INT_PRI_6 0x0006
00586 #define ADC_INT_PRI_7 0x0007
00587
00588
00589
00590 #define ADC_INT_ENABLE 0x0008
00591 #define ADC_INT_DISABLE ~ADC_INT_ENABLE
00592
00593
00594 #define ADC_1_WORD_PER_INPUT 0
00595 #define ADC_2_WORD_PER_INPUT 1
00596 #define ADC_4_WORD_PER_INPUT 2
00597 #define ADC_8_WORD_PER_INPUT 3
00598 #define ADC_16_WORD_PER_INPUT 4
00599 #define ADC_32_WORD_PER_INPUT 5
00600 #define ADC_64_WORD_PER_INPUT 6
00601 #define ADC_128_WORD_PER_INPUT 7
00602
00603
00604
00605
00606 #endif // _PIC24_ADC_H_