C-BRIC Director Presents Keynote at Nanoarch 2019

Magnetic tunnel junctions (MTJ) could improve neural computing. Complementary metal-oxide-semiconductors (CMOS) provide constant battery power to microprocessors. As microprocessor technology trends towards ultra-low power logic and low leakage embedded memory, researchers at the Center for Brain-Inspired Computing (C-BRIC) explore MTJ’s far greater energy efficiency to support the high performance demands of artificial neural networks.

C-BRIC Director, Kaushik Roy addressed the potentiality of using MTJ in place of CMOS-based memories to improve System-On-Chips performance in neural computing at the 2019 Nanoarch conference. In his keynote talk, “Stochastic & Neuromorphic Computing with Magnetic Tunnel Junctions: Prospects and Perspectives,” he discussed how MTJ mimics biological spiking neurons and synapses more closely than CMOS, while consuming ~10-100x less energy than CMOS. This research supports the goal of C-BRIC to advance cognitive computing to enable a new generation of low-power autonomous intelligent systems.

Kaushik Roy is the Director of C-BRIC and the Edward G. Tiedemann Jr. Distinguished Professor of Electrical and Computer Engineering at Purdue University. Roy received B.Tech. degree in electronics and electrical communications engineering from the Indian Institute of Technology, Kharagpur, India, and his PhD degree from the electrical and computer engineering department of the University of Illinois at Urbana Champaign. He joined Purdue in 1993 following an appointment with the Semiconductor Process and Design Center of Texas Instruments. Roy’s research interests include neuromorphic and emerging computing models, neuro-mimetic devices, spintronics, device-circuit-algorithm codesign for Nano-scale Silicon and non-Silicon technologies, and low-power electronics.

Nanoarch 2019 took place in Qingdao, China July 17-19. Nanoarch, hosted by the Institute of Electrical and Electronic Engineers (IEEE) and the Association for Computing Machinery (ACM), is a cross-disciplinary conference focused on “the discussion of novel post-CMOS and advanced nanoscale CMOS directions.”