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A New Perspective on Software-Defined Architecture: The Computer as a Network

Event Date: March 17, 2016
Speaker: Prof. Yungang Bao
Speaker Affiliation: Institute of Computing Technology (ICT)
Chinese Academy of Sciences
Time: 10:30am
Location: EE 317
Contact Name: Professor Yiying Zhang
Contact Phone: 765-49-45916
Contact Email:
Priority: No
School or Program: ECE


Traditional computer architecture primarily leverages abstracted interfaces such as instruction set architecture (ISA) and virtual memory mechanism to convey an application's information to the hardware. However, as pointed out in the community white paper “21st Century Computer Architecture”, such conventional interfaces are insufficient to convey more high-level requirement of applications to the hardware such as quality-of-service (QoS) and security, which are extremely important to data centers in the cloud era. 

We propose a new computer architecture PARD (Programmable Architecture for Resourcing-on-Demand) that provides a new programming interface to enable more software-defined functionalities. PARD is inspired by the perspective that a computer is inherently a network in which hardware components communicate via packets (e.g., over the NoC or PCIe). Thus we can apply networking technologies, e.g. software-defined networking (SDN), to this intra-computer network.

In this talk, I will present an FPGA-based PARD prototype to show how to reconstruct a computer to be an SDN-like network, which enables new functionalities like fully hardware-supported virtualization and programmable application-specific QoS. Additionally, I will present ongoing work, i.e., QoS-aware data center software stack, including hypervisors, OS kernels and cluster management systems.


Yungang Bao is a Professor of Institute of Computing Technology (ICT), Chinese Academy of Sciences and serves as associate director of Center of Advanced Computer Systems of ICT. His research interests include computer architecture and operating systems and recently focuses on resource-efficient data center design. He co-led the Hybrid Memory Trace Tool (HMTT) project that has freely provided terabytes of off-chip memory traces of real systems to architecture community. During 2010-2012, he was a postdoc fellowship at Princeton University, working on the PARSEC 3.0 project. His work is published at many top venues such as ASPLOS, HPCA, ISCA and SIGMETRICS. He was the winner of CCF-Intel Young Faculty Researcher Program of the year for 2013 and was invited to participate in Dagstuhl Seminar on Rack-scale Computing in 2015. He received his Ph.D. degree from ICT (2008) and B.S. degree from Nanjing University (2003).