Nonvolatile Flash Memory: An Overview
|Event Date:||April 23, 2008|
|Speaker Affiliation:||ITT Bombay, India|
|Sponsor:||Network for Computational Nanotechnology|
|Open To:||Acceptable for ECE694A
In this talk, we will review the memory program and erase operation of floating gate flash cells under both NAND and NOR architecture. The reliability issues, such as cycling endurance, retention and array disturbs will be reviewed next. Finally, the floating gate cell scaling challenges will be discussed, and flash memories having newer charge storage node (nitride, metal nanocrystals) will be reviewed.
Souvik Mahapatra received his PhD in Electrical Engineering from IIT Bombay, India in 1999. He was with Bell Laboratories, Lucent technologies,