There is a job opening at Western Digital. The job function will involve the following activities:

- Characterize and analyze TEG (test structures on wafer);

- Develop active(transistor) /passive (resistor/capacitor) models;

- Work with CMOS team to define CMOS targets and electrical design rules (EDR);

- Examine CMOS variation in fab and feedback to model/design;

- Work with counterparts in Japan;

- Support designers on Model, CMOS and EDR related queries;

This position requires MS+ 3 years of work experience /PhD in Electrical Engineering, ideally working on CMOS / Memory. Solid understanding of semiconductor devices, good understanding of circuits (invertors) and basic understanding of process integration is needed. Proficiency in scripting and handling large data is plus.

If interested in this position contact Piyush Dak at piyush.dak@sandisk.com