July 22, 2015
Intel - full time position
Position Type: | Research |
---|---|
Priority: | No |
Degree Requirement: | PhD, Post Doctorate |
We currently have an opening for a full time position in my group at Intel in Hillsboro, OR. You can find the details regarding the requirements for the position in this message.Would you please forward the below job description to the ECE graduate students? Ideal candidates for this position are expected to have a strong background in physical design.Interested candidates can send their resumes to my email below.Best Regards,Ahmet CeyhanJob Description: Candidate will be working as part of a team supporting RTL synthesis and place & route experiments using internal and external vendor tools to improve Intel's product die area scaling at specified frequencies of operation for existing and future process nodes. The team works in close collaboration with our partners in the process technology and design teams spanning Graphics, Imaging, and Modem. The primary focus of the team is to accurately predict the impact of process changes on density scaling and power/performance metrics thereby facilitating quick data-based decisions for scaling and power/performance commits going from one tech node to the next. The candidate for this position will be specifically expected to deal with changes to floorplan, corresponding scaling and its impact to power/performance, debug scaling/timing issues for the present tech node and predict how it would impact scaling/timing for the next tech node, improve cell utilization and transistor density metrics and keep pushing the power/performance envelope.