January 24, 2020

Postdoc opening at LBNL

Position Type: Research
Priority: No
Degree Requirement: Post Doctorate
I am looking for a postdoc for a new and potentially high-impact > project on temporal-based computation for superconducting logic. If you know anyone I'd be grateful if you can forward them the posting:
 
Post-Moore Hardware Design Postdoctoral Scholar
Bay Area, California
 
Berkeley Lab’s Computational Research Division has an opening for a Postdoctoral Scholar. This is an exciting opportunity to work on a project to develop a new form of computational logic based on temporal encoding for superconducting circuits. This work will have broad impact to high performance and other larger-scale computing for critical applications for society and science. The successful applicant will contribute to the evaluation of superconducting logic types and their merit for emerging computational models such as temporal encoding for the purpose of maximizing performance and energy efficiency. 
 
The successful applicant will need to be familiar with hardware design in both Verilog and SPICE in CMOS using CAD/EDA tools, as well as the ability to apply those skills to design of superconducting circuits with their different constraints and toolset. Using those skills, the successful applicant will design CMOS and superconducting accelerators for key application kernels to demonstrate the merit of this approach. The applicant will also make key intellectual contributions and consequently publish papers to the emerging field of superconducting logic. Knowledge of popular HPC applications and FPGA toolflows is a bonus. 
 
What You Will Do:
  • Based on the needs of the project and in collaboration with the rest of the team:
  • Design CMOS hardware accelerators for key HPC applications.
  • Utilize circuit-level design for different superconducting logic families to compare them in order to determine the best candidate for a specified set of metrics.
  • Utilize circuit design in superconducting to design computational accelerators for key HPC applications in order to compare with equivalent CMOS accelerators.
  • Extend an existing set of temporal logic collection of primitives to best suit the chosen superconducting logic family and applications.
  • Develop metrics and test benches in order compare CMOS and superconducting logic implementations for computational accelerators for key HPC applications.
What is Required: 
  • PhD or equivalent in a Computing Science or Computer Engineering-related scientific discipline.
  • Experience in circuit-level design using SPICE.
  • Proficient in Verilog and hardware design in CMOS.
  • Experience using hardware CAD tools such as from Synopsys and Cadence.
  • Familiarity with hardware CAD tools and evaluation/modelling tools in order to extend existing infrastructure to rapidly evaluate CMOS and superconducting circuits.
  • Demonstrated creativity, initiative and ability to design, develop and implement complex solutions in consultation with designated technical expert(s) and/or supervisor.
  • Experience with writing of technical papers and reports.
  • Experience with the use of script languages and system utilities such as configure, Perl, UNIX shell scripts, and “make.”
  • Proven record of working effectively in a team, seeing projects through to completion, meeting deadlines, interacting with users, and thorough documentation of contributions.
  • Willingness to learn and develop skills in new topics.
Additional Desired Qualifications:
  • Experience with superconducting logic.
  • Familiarity or experience with industry-standard benchmark programs and methods.
  • Knowledge of parallel applications and programming would be a bonus.
  • Experience with FPGA design flows would also be beneficial.
  • Experience using performance analysis tools (e.g. hardware performance counters and code instrumentation frameworks like PAPI or HPCToolkit) will also be beneficial to understand the performance of the complex scientific applications involved in the study. 
  • Demonstrated ability to lead technical efforts with teams of people will also be beneficial.
The posting shall remain open until the position is filled.
 
Notes: 
  • This is a full time 2 year, postdoctoral appointment with the possibility of renewal based upon satisfactory job performance, continuing availability of funds and ongoing operational needs. You must have less than 3 years paid postdoctoral experience. Salary for Postdoctoral positions depends on years of experience post-degree.
  • This position is represented by a union for collective bargaining purposes.
  • Salary will be predetermined based on postdoctoral step rates.
  • This position may be subject to a background check. Any convictions will be evaluated to determine if they directly relate to the responsibilities and requirements of the position. Having a conviction history will not automatically disqualify an applicant from being considered for employment.
  • Work will be primarily performed at: Lawrence Berkeley National Lab, 1 Cyclotron Road, Berkeley, CA.
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Berkeley Lab (LBNL) addresses the world’s most urgent scientific challenges by advancing sustainable energy, protecting human health, creating new materials, and revealing the origin and fate of the universe. Founded in 1931, Berkeley Lab’s scientific expertise has been recognized with 13 Nobel prizes. The University of California manages Berkeley Lab for the U.S. Department of Energy’s Office of Science.
 
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Thank you in advance
Yung-Hsiang Lu, Professor, ECE Purdue University
Office: MSEE 222, TEL: 765-494-2668, yunglu@purdue.edu l http://engineering.purdue.edu/HELPS/