Design for Test Engineer Position with Apple
|Degree Requirement:||BS, MS
Location: Santa Clara Valley, CA, USA
Description: Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a talented engineer to join our exciting team of problem solvers.
Job Summary: In this highly visible role, you will be at the center of a System On Chip design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Core Responsibilities: As a DFT engineer, you will have responsibilities spanning various aspects:
- Developing and implementing DFT architecture
- Working with designers to integrate DFT implementations and run various checks
- Working with the DV team to verify DFT implementations and review verification coverage
- Handling schedules and supporting cross-functional engineering effort
- Working with test engineers to bring up test patterns on silicon
- Working with rest of the team to document DFT specifications
- Generating structural test patterns and analyzing and improving coverage
Education: BS/MS in EE/CE is required
Qualifications: The ideal candidate will have 2-5 years of relevant experience in large processors and/or SOC designs. Experience in DFT (including Silicon debug) is desirable. A good understanding of, and problem solving skills in, Logic design and Synthesis & Timing will be a plus.
Contact Yixi Yang, firstname.lastname@example.org, for details.