Task 016/017: End-to-End Performance Benchmark Frameworks towards Connectivity-Limited Neural Computing Systems/Neuromorphic Design Flow

Abstract:

There is an ever-increasing interest in crossbar enabled matrix multiplications for machine learning inference. However, there is very limited research available on non-volatile devices at highly scaled nodes as candidates for crossbars. Current research lacks a detailed study of the effect of non-idealities and device-circuit interactions while comprehensively comparing these devices. We aim to bridge this gap between these emerging devices and their system level implications. Using physics-based models we developed 8T SRAM, RRAM, FeFET and SOTMRAM bit cells then built crossbars using them. Based on physical models for RRAM, FeFET, SOTMRAM and 8T SRAM,  we analyzed the non-ideal crossbar characteristics and performed extensive device-circuit co-optimizations which were used to choose the optimal variant of each device. The optimal variant of each device was used in this model to obtain the accuracy of Resnet-20 on CIFAR-10 wherein the matrix multiplications were offloaded to the crossbar model (with and without device variations). Based on the optimal design for each technology, our results show that FeFET has the highest accuracy due to its compact bit-cell and low conductance for output = 0 (obtained when the device is in HRS and/or the gate is grounded).

Bio:

Jeffry Victor is a PhD student at Integrated Circuits and Devices Lab (ICDL) at Purdue University. His research interests are designing Spiking Neural Networks, Neuromorphic Computing using ferroelectric FETs, and In-Memory Computing using Piezoelectric FETs. He received his bachelor's degree in 2020 from BITS Pilani, India. As part of his undergraduate research, he worked on In-Memory Matrix Multiplications using RRAM and also completed his undergrad thesis (Fall 2019) on In-Memory Computing using STT-MRAM from the Technion, Israel.