Task 003: Algorithms for Emerging Hardware/Emerging Algorithms and Computing Models for Cognition and Control on post-CMOS Hardware Platforms

Abstract: Memristive crossbars have been extensively explored for deep learning accelerators due to their high on-chip storage density and efficient Matrix Vector Multiplication (MVM) compared to digital CMOS. However, their analog nature of computing poses significant issues due to various non-idealities such as: parasitic resistances, non-linear I-V characteristics of the memristor device etc. The non-idealities can have a detrimental impact on the functionality i.e. computational accuracy of crossbars. Past works have explored modeling the non-idealities using analytical techniques. However, several non-idealities have data dependent behavior. This can not be captured using analytical (non data-dependent) models thereby, limiting their suitability in predicting application accuracy. To address this, we propose a Generalized Approach to Emulating Non-Ideality in Memristive Crossbars using Neural Networks (GENIEx), which accurately captures the data-dependent nature of non-idealities. First, we perform extensive HSPICE simulations of crossbars with different voltage and conductance combinations. Based on the obtained data, we train a neural network to learn the transfer characteristics of the non-ideal crossbar. Next, we build a functional simulator which includes key architectural facets such as tiling, and bit-slicing to analyze the impact of non-idealities on the classification accuracy of large-scale neural networks. We show that GENIEx achieves low root mean square errors (RMSE) of 0.25 and 0.7 for low and high voltages, respectively, compared to HSPICE. Additionally, the GENIEx errors are 7× and 12.8× better than an analytical model which can only capture the linear non-idealities. Further, using the functional simulator and GENIEx, we demon-strate that an analytical model can overestimate the degradation in classification accuracy by ≥ 10%on CIFAR-100 and3.7% on ImageNet datasets compared to GENIEx.

Bio: Indranil Chakraborty received his B.E. degree from Jadavpur University, India, in 2013 and the Master's degree from Indian Institute of Technology, Bombay, in 2016. His master's thesis was on physics-based modelling of PCMO-based devices. He was the recipient of best M. Tech thesis award and academic excellence award during his time at IIT Bombay for his academic performance. Currently, he is pursuing Ph.D. degree under the guidance of Prof. Kaushik Roy. His primary research interests include in-memory computing platforms based on CMOS, beyond-CMOS technologies and Si Photonics as well as hardware-software co-design for enabling edge computing systems under the broad umbrella of Artificial Intelligence. He was an intern with Intel Labs, Hillsboro, in summer of 2019.