HE-NES

The Hardware-Emulated NES

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The HE-NES is an FPGA-based hardware emulation of the original NES, released by Nintendo to US markets in 1985. We intend to recreate this classic game console with FPGA-based processing and compatibility for original peripheral hardware.

Our implementation of the classic console will have a SystemVerilog-based implementation of the NES's CPU, a modified MOS 6502, alongside on-FPGA coprocessors such as the picture processing unit (PPU), audio processing unit (APU), and video output used to construct the user experience for games. The FPGA will also have pins dedicated to data I/O beyond audio and video.

The design will interface with original NES 72-pin game cartridges and original 7-pin game controllers, using compatible mount hardware to connect these devices to the PCB and then to the FPGA.

The project will be powered using an off-the-shelf power supply, which will provide power not only to the FPGA and onboard communication but must also supply power to both the controller and cartridge.

The project should provide a complete play experience when finished, mimicking the same functionality as the original NES and allowing for use of many original games on the one device.

Project Specific Design Requirements (PSDRs):

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1. An ability to interface between the NES game cartridge and FPGA to allow the user to play the game contained on the cartridge, using a proprietary 72-pin cartridge interface. (HW)
2. An ability to interface between the FPGA and an external display using the VGA protocol to enable the user to see the game being played. (HW)
3. An ability to output a video data using an emulated Picture Processing Unit (PPU) video coprocessor on an FPGA. (SW)
4. An ability to process the inputs from cartridge and controller through the emulation of a MOS 6502 processor on an FPGA. (SW)
5. An ability to interface between the FPGA chip and peripherals using a multilayer Printed Circuit Board with power, denoising, DAC, and level-shifting components alongside a 256-Ball Grid Array connection. (HW)

Stretch Features/Goals:

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1. An ability to interface with a second NES game controller and FPGA to allow for two simultaneous users of the project. (HW)
2. An ability to interface with an analog audio output to provide 5-channel Sound from the Audio Processing Unit (APU) coprocessor. (HW)

Individual Design Journals

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